1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device, and more particularly, relates to a method for manufacturing a semiconductor device in which variation in properties of an element is suppressed which is formed in the vicinity of a semiconductor surface and also in a boundary area of an impurity region formed in a semiconductor substrate at a place apart from the surface thereof.
2. Description of the Related Art
In recent years, high-energy ion implantation has been practically used; hence, by impurity ion implantation in combination with short period heat treatment, an impurity region can be formed in a semiconductor substrate at a place apart from a surface thereof.
For example, in a semiconductor device incorporating a large scale integration (LSI) circuit, when a triple well structure is employed in which a P-type well region is surrounded by an N-type well region, an N-type impurity region, which is located at a place deeper than the bottom portion of the P-type well region and which forms a part of the N-type well region, is formed by high-energy ion implantation.
In addition, when impurity implantation by high-energy ion implantation is masked with a resist, a penetrating region which electrically connects the P-type well region and the semiconductor substrate is provided so as to penetrate the N-type impurity region forming a part of the N-type well region.
As a result, while effects of preventing noise generated from the semiconductor substrate and injection of minor carrier current in the semiconductor substrate are maintained, a predetermined potential level is applied to the P-type well region from the semiconductor substrate (for example, see Japanese Unexamined Patent Application Publication No. 10-199993)
However, it has been difficult to form an edge shape of a resist which is strictly perpendicular to the surface of the semiconductor substrate, the resist being used for masking high-energy impurity ion implantation. That is, in a boundary area of a region in which impurity ion implantation is to be masked, when being observed, the end portion of the resist mask is inclined with respect to the normal line to the surface of the semiconductor substrate. Hence, an impurity implanted in a thin portion of the resist passes therethrough, the thin portion being formed since the end portion of the resist mask has an inclined shape. As a result, since implantation energy of the impurity passing through the thin portion of the resist is decreased, the impurity does no reach a predetermined depth and stays in a region close to the surface of the semiconductor substrate.
Hence, in the boundary area of the region in which the high-energy impurity ion implantation is to be masked, the implanted impurity does not reach a predetermined depth, that is, the impurity stays in the region close to the surface of the semiconductor substrate; however, the above phenomenon is not expected beforehand, and a problem may arise in that a preferable predetermined impurity distribution cannot be obtained. As a result, when a semiconductor element is formed in the boundary area of the region in which the high-energy impurity ion implantation is to be masked, a problem may arise in that predetermined operation of the semiconductor element is adversely influenced. For example, when the semiconductor element is a MOS (Metal Oxide Semiconductor) transistor, in the vicinity of the impurity region of a drain or a source, a problem may arise in that a leakage current from a source electrode or a drain electrode is increased due to decrease in P-N junction withstand voltage.
Accordingly, in order to compensate for the impurity staying in the region close to the surface of the semiconductor substrate, it has been proposed that an impurity having a conductive type opposite to that of the above impurity is implanted in the region close to the surface of the semiconductor substrate (for example, see Japanese Unexamined Patent Application Publication No. 2000-124452).
However, it has been difficult to implant the impurity for compensation only in the boundary area of the region in which the high-energy impurity ion implantation is to be masked. That is, the impurity used for compensation is also inevitably implanted in a region other than the boundary area.
Hence, in a region in which the impurity to be compensated for is not present, the concentration of the impurity used for compensation is increased, and as a result, a problem may arise in that a predetermined impurity distribution cannot be obtained.
In addition, in the boundary area of the region in which the high-energy impurity ion implantation is to be masked, in the case in which a conductive type of a region close to the surface of the semiconductor substrate is the same as that of the impurity implanted by high-energy ion implantation, when the impurity used for compensation is implanted in the region close to the surface of the semiconductor substrate, a problem may also arise in that the impurity in a region other than the boundary area is also compensated for.